Xinhuazhang Unveils Major Digital Verification EDA Product! Endgame Thinking to Boost Chip Design Efficiency

EDA (Electronic Design Automation) is the "machine tool" of the chip industry — indispensable to its development.

Once a chip is manufactured, it cannot be altered. EDA tools are therefore essential for chip design, simulation, and verification, dramatically reducing design costs and improving efficiency. EDA was also singled out for the first time as a frontier field to be conquered in China's 14th Five-Year Plan and its 2035 long-range objectives.

There's a fitting analogy: EDA is to chip design engineers what a musical instrument is to a musician. Only with a finely crafted instrument can a musician produce beautiful music; only with efficient, user-friendly EDA tools can engineers create powerful, sophisticated chips.

On November 24, Xinhuazhang, a leading EDA intelligent software and systems company, officially released four proprietary digital verification EDA products along with its FusionVerify Platform built on a unified underlying framework. The release enables multi-tool collaboration, lowers the barrier to EDA adoption, and improves overall chip verification efficiency — marking a significant milestone for China's independently developed integrated circuit ecosystem.

At the launch event, leading Chinese technology figures including Chinese Academy of Engineering academician Shen Changxiang, National Integrated Circuit Industry Investment Fund president Ding Wenwu, and Ye Tianchun, chief technologist of the national 02 Special Project, expressed recognition of Xinhuazhang's R&D breakthroughs and encouraged the company to "make even greater contributions to the nation's integrated circuit industry development." Top executives from China's chip design and application sectors — including Unisoc CEO Leo Chu, ZTE Microelectronics general manager Long Zhijun, Biren Technology chairman and CEO Zhang Wen, and Horizon Robotics CEO Kai Yu — stated that they "see hope for domestic EDA tools" and looked forward to deepening cooperation with Xinhuazhang. The new product launch also drew extensive online participation from enterprise users, industry leaders, academician experts, investors, ecosystem partners, and authoritative media. Beyond introducing product performance, highlights, and R&D background, Xinhuazhang conducted live demonstrations of its new products in specific application scenarios, comprehensively showcasing usage processes and verification results, earning high recognition from attending industry experts and industrial partners.

The platform and products released by Xinhuazhang include:

FusionVerify Platform: Comprising five product series — logic simulation, formal verification, intelligent verification, FPGA prototyping verification system, and hardware emulation system — along with three foundational components: intelligent compilation, intelligent debugging, and intelligent verification cockpit. HuaPro-P1: High-performance FPGA prototyping verification system GalaxSim-1.0: A domestically leading digital simulator GalaxPSS: A new-generation intelligent verification system GalaxFV: The first domestically developed scalable formal verification tool based on word-level modeling in China's EDA field

In less than two years since its founding, Xinhuazhang has achieved breakthrough progress from zero to one, laying solid groundwork for more intelligent system design flows. On this occasion, we spoke with Libin Wang, Xinhuazhang's chairman and CEO.

Addressing Industry Pain Points with Endgame Thinking to Build a Next-Generation Verification System

Q: What milestone significance does Xinhuazhang's release of multiple new products hold for China's chip industry?

Libin Wang: In recent years, diverse application fields — AI, cloud servers, smart vehicles, 5G, industrial intelligent control — have placed ever-higher demands on chip performance, while requirements for power consumption and cost have become increasingly differentiated. This has caused chip design and verification costs to rise sharply.

Meanwhile, EDA's development speed has increasingly failed to keep pace with the rapid growth in chip design scale and requirements, facing numerous challenges: 1) the gap between system requirements and hardware chip design; 2) increasing costs, complexity, and risk; 3) 40-50% of design cycle time and cost spent on verification; 4) heavy reliance on engineer experience; 5) long cycles from requirements to application.

China's chip industry is in a period of rapid development, with various technological gaps being filled one by one. Baseband, AI, and other high-end chips have already reached world-class levels, which demands that China's own EDA must also be world-class.

Specifically regarding digital verification, there are three universal pain points:

1) Lack of tool compatibility. Although each tool can solve its corresponding problem, effective interaction and sharing between algorithm engines is impossible, preventing interconnection and mutual feedback. This means chip R&D often involves reinventing the wheel.

2) Data fragmentation. Industry consensus holds that stimulus migration, repeated compilation, and fragmented debugging in digital verification waste more than 30% of total verification time.

3) Lack of tool innovation. Current mainstream tools have accumulated outdated technical baggage over one to two decades of development, making it difficult to integrate advanced technologies like AI and cloud-native computing. More importantly, the platforms formed by these tool combinations were not comprehensively architected from the ground up, making it difficult to integrate and provide mutually compatible, comprehensive solutions.

These obstacles stand in the way of chip design becoming faster, more powerful, and simpler. They are also major barriers to industry adoption of domestic tools.

Therefore, we believe EDA technology must comprehensively advance, innovating at the underlying framework level to support multiple processor architectures; supporting cloud-native, AI, and other technologies; and most critically, innovating in methodology.

We adopted an "endgame thinking" approach, using an integrated verification system as our overall framework to innovate, integrate, and reconstruct classical EDA hardware and software architectures and algorithms, forming a more comprehensive, more efficient, and more user-friendly next-generation verification system. I believe today represents not only a major, far-reaching day for Xinhuazhang, but for the entire EDA industry and integrated circuit design industry.

Q: More specifically, what pain points can Xinhuazhang's new product series help the industry solve?

Libin Wang: Internally, we call this first batch of products a "royal flush," hoping to give our chip industry "a royal flush in hand, verification freedom."

Among them, the FusionVerify Platform features a unified debugging system, compilation system, intelligent partitioning technology, rich scenario stimulus sources, and unified cloud-native software architecture. It can integrate different tool technologies to provide customized, comprehensive verification solutions for various designs across different scenario requirements. This effectively improves verification efficiency and solution usability, delivering verification benefits that point tools cannot provide and bringing the industry more flexible, richer solutions.

Based on the FusionVerify Platform's unified underlying framework, the four proprietary EDA tools built from zero to one offer the following advantages respectively:

HuaPro-P1 high-performance FPGA prototyping verification system, featuring self-developed software that automates intelligent design flows, reducing manual user effort and shortening chip verification cycles.

GalaxSim-1.0, a domestically leading digital simulator, using new software architecture to provide multi-platform support, and already tested on multiple domestic architectures based on ARM platforms. It has reached mainstream commercial simulator levels in semantic parsing, simulation behavior, and timing models.

GalaxPSS new-generation intelligent verification system, based on the fusion of Accellera PSS standards and advanced verification methodology, automatically generating scenarios for current and future complex verification needs, reducing reliance on engineers' manual scenario-writing experience, and improving verification scenario coverage and completeness.

GalaxFV is the first domestically developed scalable formal verification tool based on word-level modeling, reaching internationally advanced levels in modeling, improving usability and efficiency, and lowering the barrier to applying formal verification in industry.

Q: I noticed Xinhuazhang's released products all have romantic names. What meanings lie behind them?

Libin Wang: "Hua" represents our hardware product line — the birch tree is resilient and reliable, tall and straight, symbolizing our hope to rapidly reach application-oriented system-on-chip verification goals. "Galax" represents our software products — we hope to compute and explore the vast, complex space of chip verification, as expansive as the firmament.

Our high-performance FPGA prototyping verification system is named "HuaPro-P1," where "Pro" suggests professional and "P1" signifies being number one, representing the platform's rapid automated implementation, high-speed operation performance, and efficient resolution of software and hardware errors.

The "Galax" series names also incorporate much Chinese cultural depth. For example, "GalaxSim" (Qiong Ding) originally referred to the stable cornerstone in the celestial court, symbolizing our digital simulator's high simulation precision and efficiency. In "GalaxPSS" (Qiong Jing), "Jing" represents scenarios, and the phrase also homophones with "exhaustive" (qiong jin), symbolizing the product's ability to exhaustively cover various verification scenarios. "GalaxFV" (Qiong Han) evokes the vast, expansive universe, reflecting our hope that our scalable formal verification tool can provide absolutely reliable, comprehensive verification conclusions without omission.

Shedding Historical Technical Baggage, Broadly Attracting Elite Talent

Q: How did Xinhuazhang manage to build multiple high-performance proprietary integrated circuit design tools from zero to one in just over a year?

Libin Wang: Xinhuazhang was founded in March 2020, when the pandemic was at its most severe. However, we had accumulated strength over many years, and national and industrial needs had become urgent. With strong support from all sides, we overcame numerous difficulties to formally establish Xinhuazhang.

Today's achievements stem from several factors. First, technically, we have innovated boldly. Without the outdated technical redundancy baggage of past mainstream tools, we have fully integrated cloud computing, AI, and other next-generation technologies on the basis of current most advanced software engineering methodologies and high-performance hardware architectures, developing EDA through new pathways. For example, based on the FusionVerify Platform, we have put verification tools on the cloud. Through platform and cloud-native technologies, we can unify cloud resource scheduling interfaces and usage, achieving high resource utilization and flexible resource allocation.

Additionally, industrial development and technological revolution depend on talent. EDA talent is interdisciplinary, involving mathematics, physics, computer science, and electronic engineering. To this end, we are rooted in China while recruiting top global talent; we seek not only industry elites from the EDA field but also broadly attract talent from AI and internet industries. Currently, we have 300 employees and have established 9 R&D centers globally. Through continued strengthening of industry-university-research cooperation with top institutions, we believe we will continuously attract more outstanding talent.

Accelerating the Arrival of the EDA 2.0 Era

Q: What are Xinhuazhang's hopes and vision for the future of the EDA industry?

Libin Wang: EDA, as a foundational key technology for the digital industry, has always connected and run through the development of chips and technology applications. Future digital systems will be deeply integrated fusions of systems + chips + algorithms + software.

We previously proposed the goal of building a next-generation intelligent integrated circuit design flow (EDA 2.0) and released the EDA 2.0 White Paper.

So-called EDA 2.0 is not a binary state change from 0 to 1, but rather further enhancement of openness at each stage based on EDA 1.X. We propose three key directions: openness and standardization, automation and intelligence, and platformization and servitization.

Under the premise of openness and standardization, past design experience and data are absorbed into full-process EDA tools and models, forming intelligent EDA design and fully automated flows from system requirements to chip design and verification.

Simultaneously, to meet computing power and platformization requirements, EDA 2.0 should integrate with cloud platforms and diverse cloud hardware, fully utilizing mature cloud software and hardware ecosystems.

Furthermore, to support application vendors in rapidly obtaining needed chips, EDA 2.0 should also combine products and services, ultimately realizing an EDA service platform — EDaaS (Electronic Design as a Service).

Going forward, we will continue to center on the evolution of user needs, with technological innovation as our driving force, employing agile development, continuous integration, and other advanced software development processes to continuously refine our platform and products, making chip design simpler and more accessible, and accelerating the arrival of the EDA 2.0 era.

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