Chip and Semiconductor Startups Are Hiring | Z Jobs

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We look forward to having you join us!

Over the past year, every time we've written about chips and semiconductors, the stories have never been short on challenges.

MetaX co-founder Li Peng said: "I've always dreamed of doing the hardest thing in the world." Lidong Zhao, founder and chairman of Enflame, said: "The path of building high-end chips is full of ups and downs." For Lightelligence, back in 2017, photonic computing chips weren't even a "category" yet — many people thought it simply couldn't be done.

But that's exactly why this space holds such enormous room for imagination.

This time, we want to share some teams that are exploring new directions — and looking for people to join them.

Qisuan Guangqi is working on optical computing. Shunyuan is trying to build large models directly into chips. CoreXVision is exploring miniature spectral sensing. ZhiZi XinYuan focuses on AI computing acceleration. And LinkZill is expanding the applications of TFT semiconductors into fields like life sciences.

Starting this week, ZhenFund will share open roles from one industry every week. Scan the QR code below to apply with one click.

We look forward to having you on board.

Qisuan Guangqi

Founder Hansen Zhong studied under Professor Chaoyang Lu during his PhD at the University of Science and Technology of China, researching photonic quantum computing, and was a core member of the team behind the "Jiuzhang" series of quantum computing prototypes.

Founded in October 2024, Qisuan Guangqi aims to break through the compute bottleneck of electronic chips through fundamental architecture innovation, delivering high-performance, energy-efficient optical computing hardware for AI large models and advancing domestic substitution of high-end computing chips. The company has completed angel and angel+ rounds totaling several hundred million yuan.

Open roles (click the text to view the JD):

1. AI Research Intern | Internship | Shanghai

【Responsibilities】

  1. Independently explore the capability boundaries of Agents in verification, physical implementation, board-level testing, and other stages, around well-defined research questions;

  2. Collaborate with Agents to run experiments and produce structured records;

  3. Participate in controlled comparative experiments;

  4. Honestly document both successes and failures — negative results matter just as much.

【Requirements】

  1. Master's degree or above in a STEM field (flexible for exceptional candidates);

  2. Proficient in Python/Linux; familiar with HPC/containers;

  3. Heavy user of AI Agent harnesses (Claude Code/Codex/Cursor, etc.), able to use AI assistance to quickly ramp up in unfamiliar domains such as chip toolchains — no chip background required;

  4. Rigorous and detail-oriented, with high standards for result reliability; genuine interest in autonomous AI chip design; clear communication in Chinese.

Bonus: digital circuits / computer architecture / EDA; CI/evaluation platforms; open-source contributions; research collaboration; competition awards.

Team: our AI Agent has already completed a working CPU, and we're expanding to more design stages, targeting top-tier academic results.

What you'll get: early involvement in building a complete technical system, with room to grow into a tech lead; substantive authorship on high-quality work; unlimited LLM API access plus real chip toolchains/hardware; deep collaboration with frontline researchers.

2. Active Silicon Photonics Chip Engineer | Experienced/New Grad | Shanghai

【Responsibilities】

  1. Design, simulate, and optimize active silicon photonic devices, primarily silicon-based electro-optic phase modulators, micro-rings/MZIs;

  2. Lead proof-of-concept, layout design, and performance improvement of active silicon photonics chips;

  3. Develop test plans for active devices, and process and analyze test data to guide design improvements;

  4. Work with circuit/algorithm engineers on control algorithm design and circuit verification;

  5. Track product development needs and industry trends, and help shape the technical roadmap for silicon-based active devices.

【Requirements】

  1. Master's degree or above in optoelectronics, microelectronics, communications, or a related field;

  2. 3+ years of high-speed silicon photonics chip design experience; familiar with the full cycle of silicon electro-optic phase modulators from design to tape-out to testing, especially doped-region design and simulation;

  3. Proficient with at least one electromagnetic/optical simulation tool such as Lumerical or COMSOL; proficient with at least one TCAD tool such as Silvaco or Sentaurus;

  4. Familiar with standard testing processes and methods for active silicon photonic devices and related test equipment;

  5. Understanding of circuit fundamentals, with the ability to do co-design across photonics and electronics.

【Bonus】

  1. Experience designing and taping out MZM/MRM modulators preferred;

  2. Strong Python programming skills preferred;

  3. Strong English communication skills preferred.

3. Silicon Photonics Platform Photodetector Design Engineer | Experienced/New Grad

【Responsibilities】

  1. Design and simulate high-speed germanium waveguide photodetectors (Ge-Si PDs) on silicon photonics platforms, covering both passive structures and active regions;

  2. Own tape-out and testing of on-chip Ge waveguide photodetectors, evaluating key metrics such as responsivity, dark current, bandwidth, and uniformity;

  3. Interface with fabs and their process engineers, participating in iterative optimization of process parameters;

  4. Work with circuit engineers on readout circuit verification.

【Requirements】

  1. Master's degree or above in physics, optics, optoelectronics, microelectronics, communications, or a related field;

  2. 2+ years of photodetector design experience on silicon photonics platforms; familiar with the design, tape-out, and testing of Ge waveguide PDs;

  3. Proficient with at least one electromagnetic/optical simulation tool such as Lumerical or COMSOL; proficient with at least one TCAD tool such as Silvaco;

  4. Familiar with standard testing processes and methods for active silicon photonic devices and related test equipment;

  5. Understanding of circuit fundamentals, with the ability to do co-design across photonics and electronics.

【Bonus】

  1. Experience designing and taping out on-chip GeSi photodetectors preferred;

  2. Strong Python programming skills preferred;

  3. Strong English communication skills preferred.

4. Senior Analog IC Design Engineer | Experienced Hire | Shanghai

【Responsibilities】

  1. Participate in defining analog IC product specifications;

  2. Circuit design and simulation verification for analog ICs;

  3. Guide layout engineers through floorplanning and complete layout design;

  4. Assist with product debugging;

  5. Write and maintain datasheets, design reports, patents, and related documentation;

  6. Support application engineers in resolving customer-side application issues.

【Requirements】

  1. Master's degree or above from a Double First-Class university, in microelectronics, electronic information, semiconductor physics, or a related field;

  2. 5+ years of analog IC product design experience, including high-volume production design experience across multiple products (40nm and below);

  3. Skilled at designing common analog circuit blocks such as bandgap references, op-amps, comparators, oscillators, PLLs, and ADCs;

  4. Familiar with low-power ADC design (especially SDADC, SAR ADC, etc.); proficient with mainstream EDA tools;

  5. Proactive, with strong team collaboration skills.

5. Chip Packaging Engineer | Experienced Hire | Shanghai

【Responsibilities】

  1. Architecture design and simulation: define and design 2.5D CoWoS and 3D packaging architectures, with a focus on stack-up design for interposers such as Silicon Interposer and RDL, supporting Chiplet integration solutions;

  2. High-density interconnect design: lead high-density routing under CoWoS architectures, optimize uBump, uPad, and redistribution layer layouts, and ensure signal and power integrity;

  3. Substrate development and simulation: complete packaging substrate selection and design, lead thermal and stress simulations, and work with packaging vendors to resolve heat dissipation, warpage, and related issues;

  4. Collaborative optimization: deeply participate in "chip–package–PCB" co-design, balancing key metrics across electrical performance, thermal reliability, and cost, and establishing advanced packaging design standards.

【Requirements】

  1. Education: Master's degree or above in electronic engineering, microelectronics, materials science, physics, or a related field;

  2. Industry experience: 2+ years of advanced packaging design experience; familiar with FCCSP, FCBGA, WLCSP, SiP, InFO, HBPOP, and other packaging configurations; hands-on project/tape-out experience with 2.5D CoWoS, InFO, or similar 2.5D/3D packaging; familiarity with Chiplet integration is a plus;

  3. Technical skills:

Design tools: Cadence APD or Siemens EDA Xpedition, etc., with the ability to design complex substrates and silicon interposers;

Simulation tools: Ansys HFSS, SIwave, Icepak, etc., for signal integrity analysis and thermal/stress simulation.

Related reading: ZhenFund Leads Latest Funding Round for Qisuan Guangqi to Advance Optical Computing Chips and Systems

Shunyuan

In August this year, AMD announced its acquisition of AI inference chip company Taalas. Around the same time, a team pursuing the same approach emerged in China, aiming to build China's first ultra-fast AI inference chip benchmarked against Taalas.

Shunyuan's founder and CEO holds a PhD in mathematics and previously led a 50-person algorithm team at a leading company. The core team comes from Tsinghua University's Yao Class, Shanghai Jiao Tong University's ACM Class, Peking University, the National University of Defense Technology, and other institutions, with full tape-out experience across multiple chips.

Shunyuan wants to build large models directly into silicon. As China's first model-hardening (Model-to-Chip) chip company, the team is working to replace part of GPU inference with dedicated chips, cutting cost, energy consumption, and latency. The company raised nearly 100 million yuan in its first round, and its first chip is currently in development.

Open roles (click the text to view the JD):

1. Model Inference Optimization Engineer | Internship/New Grad | Shanghai

【Responsibilities】

  1. Own model quantization and fixed-point optimization for large-model inference chips: subject to accuracy requirements, find the optimal bit width and numerical format (int4/int8/fixed-point, group quantization, etc.) for each layer/tensor to minimize area and power consumption;

  2. Participate in front-end RTL design during model hardening (model-to-chip): implement the defined operators and dataflows in SystemVerilog, and optimize the datapath, data reuse, and pipelining for performance and area;

  3. Work with the algorithm and architecture teams to define operator hardening plans, and build and run performance models (C/Python) to validate the design;

  4. Own correctness and performance verification of the quantization scheme and its RTL implementation.

【Requirements】

  1. Gold medal or above at ICPC/CCPC regional contests (or equivalent competitive programming results);

  2. Solid foundation in algorithms and data structures, with strong C/C++ programming skills;

  3. Strong interest in performance optimization and numerical computation, with the ability to break down complex optimization problems and push them to the limit;

  4. Fast learner, willing to pick up deep learning fundamentals, fixed-point arithmetic, and digital front-end RTL design in a short time;

  5. Strong sense of responsibility, with good teamwork and communication skills;

  6. Bachelor's degree or above from a 211/985/C9 university, majoring in mathematics/physics or computer science/AI.

【Nice to have】

  1. Deep familiarity with the Transformer architecture;

  2. Experience with FPGA, SystemVerilog, or related hardware projects;

  3. Experience with GPU kernels (CUDA), compilers, or high-performance computing;

  4. Experience in model quantization, fixed-point conversion, or inference optimization.

2. Back-End Physical Design Engineer: PR Track | Internship/New Grad

【Responsibilities】

  1. Participate in full-chip floorplan planning (partition/IO assignment);

  2. Participate in the physical design of subsystems and modules, including physical synthesis, floorplanning, place & route, PPA optimization, and closing Timing/IR/EM/DRC/LVS/ERC;

  3. Complete chip sign-off and delivery;

  4. Participate in optimizing back-end design flows and methodologies;

  5. Actively participate in and learn full-chip IR/EM sign-off, or full-chip PV and sign-off (DRC/LVS/PERC).

【Requirements】

  1. Bachelor's degree or above in microelectronics, integrated circuits, electronic engineering, or a related field; candidates from 211/985 universities preferred;

  2. Genuine interest in chip physical design;

  3. Able to focus on back-end process design flows and methodologies;

  4. Familiar with back-end EDA tools;

  5. Able to quickly get up to speed with scripting (tcl/perl/python) or AI tooling;

  6. Strong team player with a conscientious, responsible work attitude.

3. Back-End Physical Design: PI/SI Track | Internship/New Grad

【Responsibilities】

  1. Collaborate with colleagues on chip top-level physical design, package design, and PCB design; participate in simulation analysis and optimization of power delivery and high-speed digital interfaces;

  2. Learn to use common EDA tools to extract circuit models of silicon, package, and PCB; build power integrity and signal integrity simulation test benches, and refine and optimize the simulation platform based on measured results;

  3. Learn end-to-end SI optimization for high-speed SerDes IO, DDRx/LPDDRx, UCIE, etc.;

  4. Learn to model the power delivery network (PDN) across silicon, package, and PCB; define specific PI target breakdowns, and complete power supply design optimization and sign-off;

  5. Track and research chip-to-system solutions for various high-speed bus interfaces and power delivery designs, and develop PKG/PCB design guidelines.

【Requirements】

  1. Bachelor's degree or above in electromagnetic fields and microwave technology, electronic engineering, communications engineering, or a related field; requirements may be relaxed for candidates with outstanding academic records;

  2. Candidates who can focus on on-die SI/PI simulation are preferred;

  3. Familiarity with 3DIC is a plus;

  4. Familiarity with signal integrity software such as Hspice, Sigrity, ADS, HFSS, etc., and with package and PCB design;

  5. Hands-on experience with high-speed oscilloscopes, network analyzers, and other instruments, with the ability to debug high-speed signal integrity issues;

  6. Strong grades in digital and analog circuit coursework preferred.

4. HR Intern (Recruiting & Talent Operations) | Internship

【Responsibilities】

  1. Own initial resume screening, candidate outreach (cold calls), and interview scheduling; coordinate interviewer and candidate availability to keep the hiring process moving efficiently;

  2. Follow up on interview loops and talent evaluations, collect and organize interview feedback, and drive the hiring approval process;

  3. Regularly produce recruiting funnel reports, including metrics such as resume pass-through rate and offer acceptance rate;

  4. Assist with pre-onboarding candidate communication, salary verification, and background checks to close out offers smoothly.

【Requirements】

  1. Current undergraduate or graduate student graduating in 2028; majors in human resources, psychology, management, or related fields preferred;

  2. Available at least 4 days per week, and able to commit to 3+ consecutive months;

  3. Excellent phone communication skills and resilience under pressure; able to calmly handle unexpected situations in candidate conversations and keep pace with fast-moving recruiting work;

  4. Strong logical thinking and data sensitivity; proficient in Excel, including pivot tables and VLOOKUP;

  5. Detail-oriented and patient, with a strong sense of follow-through; able to handle tedious tasks such as offer document verification and interview schedule conflict resolution.

【Nice to have】

  1. Internship experience in executive search or in-house HR recruiting;

  2. Familiarity with collaboration tools such as Lark and with HR systems.

Related reading: As AMD Acquires Taalas, a Chinese Company Decides to Etch AI Models Into Silicon

CoreXVision

Founder Jie Bao is a doctoral advisor in the Department of Electronic Engineering at Tsinghua University and a former MIT postdoc, where he studied quantum dots under Professor Moungi Bawendi, winner of the 2023 Nobel Prize in Chemistry. He published pioneering work on quantum dot spectroscopic sensing in Nature as both first and corresponding author.

In 2016, Bao founded CoreXVision to bring this technology out of the lab and into industrialization. The team has developed and mass-produced the world's first high-performance quantum dot spectroscopic sensing chip, shrinking traditional benchtop spectrometers by several orders of magnitude, and has been named a national-level "Little Giant" — a designation for specialized, sophisticated SMEs.

CoreXVision aims to embed spectroscopic sensing chips into more smart devices, enabling real-time detection, identification, and analysis of different substances — and ultimately to build a spectral data platform for materials.

Open roles (click the text to view the JD):

1. Recruiting Manager | Experienced Hire | Beijing

【Responsibilities】

  1. Develop a precise grasp of hiring needs: communicate deeply with business units to understand business strategy and team pain points, and translate them into clear candidate profiles and sourcing strategies, ensuring hiring goals align tightly with the company's stage-specific development goals;

  2. Continuously expand and maintain diverse recruiting channels, regularly evaluate channel effectiveness, and keep optimizing the recruiting process to shorten time-to-hire and improve conversion;

  3. Accurately assess candidates' professional capabilities, cultural fit, and growth potential to ensure high-match hires and reduce hiring risk;

  4. Partner with the marketing team to plan and execute employer branding campaigns that raise the company's visibility and appeal; maintain a strong candidate experience with timely feedback and warm communication to build a positive reputation;

  5. Regularly compile and analyze key recruiting metrics, produce recruiting effectiveness reports, identify bottlenecks, and propose targeted improvements;

  6. Support work across HR system optimization, employee relations, training and development, and other modules; work with the team on annual workforce planning and other key projects.

【Requirements】

  1. Bachelor's degree or above; majors in human resources, psychology, management, or related fields preferred;

  2. 5+ years of recruiting experience, including at least 2 years independently owning technical roles or government/key-account roles; backgrounds in high-tech, smart manufacturing, or B2G industries preferred;

  3. Mastery of the full recruiting cycle; able to accurately understand competency models for complex technical roles, with systematic interview methods and talent evaluation frameworks;

  4. Familiar with national labor laws and recruiting compliance requirements; able to properly manage risks throughout the hiring process;

  5. Exceptional time management and multitasking skills, with the ability to deliver efficiently under high pressure;

  6. Clear logic and strong communication and coordination skills; adept at building trust and collaboration with business leaders of different styles;

  7. Sharp insight and analytical judgment, able to quickly capture key information from resume details and interview conversations;

  8. Fair and principled, committed to professional ethics, rational and impartial, and oriented toward long-term mutual benefit;

  9. Work location: Zhongguancun, Beijing.

【Nice to have】

  1. Background in high-tech, smart manufacturing, or B2G industries;

  2. Experience recruiting for technical roles or government/key-account roles.

2. Organizational Development Manager | Experienced Hire | Beijing

【Responsibilities】

  1. Own company-wide organizational effectiveness diagnostics and improvement: systematically build a high-performance organizational culture through organizational diagnostics, talent reviews, training system development, and succession planning for key roles, ensuring the talent strategy is deeply aligned with the business strategy;

  2. Go deep into each business line and run regular organizational health diagnostics to identify pain points and talent bottlenecks in organizational structure, processes and mechanisms, and team dynamics; deliver targeted solutions and drive implementation;

  3. Establish and continuously refine the company's talent review mechanism, run regular talent assessments, and accurately identify high-potential talent and core contributors;

  4. Build succession plans for key roles and design individualized development plans (IDPs) for each high-potential employee, ensuring continuity and stability of the core talent pipeline;

  5. Build a tiered and categorized training system covering new hire onboarding programs, launch programs for frontline managers, and leadership development programs for mid- and senior-level leaders;

  6. Build the internal trainer team and integrate and manage high-quality external training resources;

  7. Provide business unit leaders with professional perspectives and coaching on organization and talent; empower business managers to improve their end-to-end capabilities in "selecting, developing, deploying, and retaining" talent, and drive managers at all levels to take primary ownership of talent development.

【Requirements】

  1. Bachelor's degree or above; majors in human resources, psychology, management, organizational behavior, or related fields preferred;

  2. 8+ years of HR experience, including at least 5 years of hands-on experience in organizational development or talent development;

  3. Experience at similarly scaled companies in hard tech, smart manufacturing, IoT, or environmental industries preferred;

  4. Proficient in organizational diagnostic tools and talent review methodologies; familiar with leadership model development, with complete, successfully implemented cases of talent pipeline programs or training system builds;

  5. Outstanding cross-functional communication, coordination, and influence; able to build deep trust with managers of different styles;

  6. Strong resilience under pressure and project management skills; able to drive multiple projects to delivery in parallel in complex environments;

  7. Clear logic, strong data analysis skills and writing ability; able to independently produce high-quality proposals and reports;

  8. Enduring passion for and curiosity about organizational and people development;

  9. Work location: Zhongguancun, Beijing.

[Bonus]

  1. Experience at similarly scaled companies in hard tech, smart manufacturing, IoT, or environmental industries preferred;

  2. Complete, successfully implemented cases of talent pipeline programs or training system builds preferred.

3. Sales Operations Director | Full-time | Beijing

[Responsibilities]

  1. Build sales target management tools and establish weekly, monthly, and quarterly business tracking and review mechanisms to continuously monitor target attainment;

  2. Build a sales process management system covering lead, opportunity, visit, contract signing, delivery, and after-sales stages;

  3. Define key metrics, management actions, follow-up cadences, and early-warning mechanisms across the sales process;

  4. Map out and continuously optimize the end-to-end sales LTC process; build SOPs, collaboration workflows, milestone standards, responsibility assignments, and exception-handling mechanisms for key business stages;

  5. Build sales operations dashboards, data ledgers, and analytical models to promptly identify business problems and opportunities, providing a basis for management decision-making;

  6. Drive the development and optimization of CRM and sales management tools and systems to improve business visibility and management efficiency;

  7. Run weekly sales meetings, monthly business reviews, and special initiative meetings, driving pre-meeting data preparation, in-meeting problem focus, and closed-loop follow-through on action items.

[Requirements]

  1. 8+ years of To B/G sales operations experience, with familiarity across the full closed loop from lead to deal closure;

  2. Background in smart manufacturing or technology companies;

  3. Strong hands-on execution ability; able to personally drive process implementation, data organization, and other concrete work;

  4. Excellent data insight skills; able to pinpoint business problems through data and produce actionable remediation plans;

  5. Strong owner mindset and self-drive, results-oriented;

  6. Strong cross-functional communication, work-driving, execution, and coordination skills.

4. Intellectual Property Engineer | Full-time | Beijing

[Responsibilities]

  1. Responsible for patent mining, patent portfolio planning, and patent risk screening for technology development projects;

  2. Review patent applications and responses to office actions;

  3. Conduct searches related to patent proposals, patent stability, and more;

  4. Carry out competitor and industry technology analysis;

  5. Collect and organize industry patent intelligence;

  6. Deliver intellectual property training for technical staff.

[Requirements]

  1. Bachelor's degree or above in a science or engineering discipline;

  2. Strong English reading and writing skills;

  3. 3+ years of IP experience at a company or agency;

  4. Proactive and highly responsible, with strong communication and coordination skills.

[Bonus]

  1. Patent agent qualification certificate preferred;

  2. IP experience at manufacturing companies preferred.

5. Senior Hardware Engineer | Full-time | Beijing

[Responsibilities]

  1. Responsible for detailed hardware design of products; complete power supply, clock, and module partitioning design based on hardware and business block diagrams;

  2. Responsible for hardware component selection, schematic design, and PCB design;

  3. Draft and review board-level hardware test plans based on product hardware solutions and board-level design, ensuring test completeness;

  4. Draft BOMs and follow SMT progress; participate in board-level testing, system testing, reliability testing, production transfer, and manufacturing support;

  5. Complete board-level signal SI/PI testing per test plans and produce test reports; organize reviews and drive closure of residual risks and issues;

  6. Participate in hardware cost reduction, compatible substitution, and material preparation; help resolve hardware supply chain issues;

  7. Drive signal integrity testing, EMC, and product certification work; locate, analyze, and resolve hardware problems;

  8. Complete board-level EMC testing and support product certification;

  9. Participate in hardware technology platform development and hardware system solution reviews;

  10. Take on hardware testing tasks for company projects, break down tasks and conduct related technical reviews, ensuring on-time, high-quality project delivery.

[Requirements]

  1. Bachelor's degree or above in electronics or a related field;

  2. 3+ years of board design experience;

  3. Experience independently designing boards for new projects; strong debugging skills with sound logical analysis and judgment;

  4. Familiar with smart product solutions, with in-depth knowledge of chip solutions from mainstream industry suppliers;

  5. Familiar with power circuits including power supplies, interface protection, board-level power circuits, power sequencing management, and power filtering;

  6. Deep understanding of SI/PI;

  7. Familiar with EMC, reliability, and DFM design; able to incorporate related requirements at the solution stage;

  8. Proficient with oscilloscopes, logic analyzers, and other common debugging and testing equipment;

  9. Strong team communication skills, responsibility, drive, and learning ability;

  10. Able to deliver high-quality work under significant pressure, with an open mindset.

ZhiZi XinYuan

The founding team includes a "Root Technology Leader" from Huawei's 2012 Central Research Institute, a CTO from a top-tier foundation model company, and scientists from leading research institutes. Several members hold IMO/ICPC gold medals and top academic achievements in AI, with academic guidance from Academician Luo Zhiquan, an authority in operations research and optimization.

ZhiZi XinYuan focuses on AI computing acceleration. Its self-developed engineering-grade Agent product, Kerminal, provides operator development, model migration, and performance tuning for heterogeneous chips such as GPGPUs and NPUs, applying the technology to AI4Science scenarios including biopharmaceuticals and mineral exploration.

Open positions (click the text to view the JD):

1. Agent Harness Engineer | Full-time | Shenzhen

[Responsibilities]

  1. Agent runtime maintenance and evolution: Own Kerminal's core execution chains — session, task, turn, streaming, tool call, approval, interruption, retry, and error recovery — ensuring stability across long tasks, multi-turn interactions, and multi-tool invocation;

  2. Tool execution framework development: Maintain tool capabilities including shell, patch, file read/write, MCP, subagent, web/image, and structured output; design tool schemas, permission boundaries, timeout controls, output truncation, and failure-handling mechanisms;

  3. Agent evals and replay system development: Build golden tasks, trajectory replay, tool-call evaluation, success rate/cost/latency metrics, and regression detection mechanisms based on real scenarios such as operator development, code modification, model migration, and customer delivery;

  4. Observability and fault diagnosis: Improve SSE diagnostics, rollout JSONL, traces, logs, error codes, token/cost statistics, and failure attribution, so that Agent failures can be recorded, reproduced, analyzed, and fixed;

  5. Protocol and product boundary maintenance: Maintain protocol boundaries among CLI/TUI/exec/MCP server/app-server/SDK, ensuring consistency across event streams, JSONL output, SDK types, documentation, and tests;

  6. Heterogeneous computing scenario adaptation: Collaborate with operator, inference, and Agent application teams so that Kerminal can reliably serve real engineering environments including CUDA, Triton, AscendC, C++, Python, and Rust.

[Requirements]

  1. Bachelor's degree or above in computer science, software engineering, electronics, mathematics, or a related field; 3+ years of experience in systems engineering, developer tools, AI infra, or Agent systems;

  2. Proficient in at least one of Rust/C++/Python, with Rust preferred; familiar with Linux, process management, async programming, serialization protocols, and engineering debugging;

  3. Understanding of core LLM Agent mechanisms, including tool calling, streaming, multi-turn task loops, context management, structured output, MCP, or similar tool protocols;

  4. Strong systems thinking; able to analyze problems across multiple interacting layers — model, tools, runtime, protocols, logs, tests, and user tasks;

  5. Commitment to engineering quality; able to maintain automated tests, regression tests, CI, snapshots, protocol compatibility, and documentation sync;

  6. Strong communication skills; able to collaborate with Agent engineers, operator researchers, inference deployment engineers, and customer-side engineers to close the loop on issues.

[Bonus]

  1. Experience with Agent runtime, AI evals, AI observability, coding agents, AI IDEs, or CLI/TUI developer tools;

  2. Familiarity with ecosystems such as MCP, OpenAI Responses API, vLLM/SGLang, LangGraph, or OpenAI Agents SDK;

  3. Experience with complex async systems, event-stream systems, task scheduling systems, test replay systems, or log diagnostic platforms;

  4. Experience with CUDA/Triton/AscendC/HPC/compilers/high-performance computing toolchains;

  5. Deep hands-on use of AI coding tools, with the ability to clearly analyze their failure modes.

2. Agent Engineer | Full-time | Shenzhen

[Responsibilities]

  1. Agent workflow design and iteration: Design Kerminal's workflows around real development tasks — task understanding, code search, plan formulation, tool invocation, file modification, test verification, failure recovery, and result summarization;

  2. Prompt/Skills/tooling strategy development: Iterate system prompts, developer instructions, skills, task templates, and tool-use strategies, and validate through evals whether changes genuinely improve task success rates;

  3. Real-task benchmark development: Distill repeatable benchmarks from tasks such as operator development, customer issues, code fixes, migration adaptation, and performance tuning; define success criteria, scoring logic, and failure taxonomies;

  4. Failure-mode analysis and harness improvement: Analyze Agent failure cases, decomposing problems into insufficient context, tool design flaws, runtime behavior issues, model capability limits, evaluation gaps, or product interaction issues, and push fixes into the toolchain and harness;

  5. Operator and heterogeneous development scenario adaptation: Build specialized Agent capabilities for engineering environments such as CUDA, Triton, AscendC, C++, Python, and Rust — covering build, testing, performance analysis, error interpretation, and code review;

  6. Collaborate with the harness team: Participate in designing harness capabilities — tool schemas, subagent collaboration, context compression, task replay, trajectory evaluation, long-task recovery — so that hard-won task experience becomes durable system capability.

Requirements

  1. Bachelor's degree or above in computer science, mathematics, electronics, physics, or a related field; 2+ years of experience in software engineering, AI engineering, systems development, or high-performance computing;

  2. Proficient in at least one of Python/C++/Rust/CUDA/Triton; able to independently read large codebases and resolve environment configuration, compilation, testing, and debugging issues;

  3. Understand the fundamentals of LLM Agents: tool use, planning, context engineering, RAG/skills, eval loops;

  4. Not satisfied with just tweaking prompts — willing to go deep on tool protocols, runtime behavior, evaluation systems, and failure postmortems;

  5. Strong problem decomposition skills: able to turn "the Agent isn't working well" into reproducible, measurable, optimizable engineering problems;

  6. Good communication and writing skills; able to produce technical summaries, task retrospectives, evaluation reports, and product improvement proposals.

Nice to have

  1. Deep experience using coding Agents such as Claude Code, Codex, Cursor, Devin, Aider, or Cline, with systematic analysis of their strengths and weaknesses;

  2. Experience building coding agents, automated repair systems, AI IDEs, code evaluation, tool-calling frameworks, or agent benchmarks;

  3. Experience with CUDA/Triton/AscendC/TVM/MLIR/compilers/HPC/kernel optimization;

  4. Experience with real customer delivery, complex engineering problem diagnosis, or cross-team technical initiatives;

  5. Contributions to open-source projects such as Triton, TVM, MLIR, vLLM, SGLang, LangChain, or MCP.

3. AI Kernel Generation and Model Adaptation Optimization | Internship | Shenzhen

This project covers AI kernel generation, model training/inference adaptation, performance evaluation, and automated optimization. We're building an engineering system that spans hardware knowledge bases, kernel generation and evaluation, model benchmarks, profiling attribution, optimization tools, agents, and data flywheels — supporting adaptation and optimization across different AI hardware, model types, and single-node/multi-node training and inference scenarios.

Responsibilities

  1. Participate in AI kernel generation, kernel evaluation, kernel library development, and performance optimization;

  2. Participate in building model training and inference benchmarks, one-click run scripts, configuration templates, and experiment reports;

  3. Participate in profiling data collection, performance bottleneck analysis, optimization plan validation, and results documentation;

  4. Participate in training/inference framework adaptation, single-node/multi-node environment setup, issue reproduction, and debugging;

  5. Participate in building knowledge bases and datasets covering hardware, models, frameworks, kernels, performance results, and failure cases;

  6. Participate in prototyping agents, automated workflows, data flywheels, and specialized model training;

  7. Support experiment reproduction, documentation, test cases, tooling scripts, and milestone technical reports.

Requirements

  1. Open to current bachelor's, master's, and PhD students. Preferred majors: computer science, AI, software engineering, electronic information, automation, mathematics, computer systems, HPC, ML systems. We match internship tasks to each candidate's engineering ability, research background, and availability;

  2. Familiar with Python, Linux, and Git, with basic engineering development, scripting, and debugging skills;

  3. Familiar with PyTorch and deep learning model training or inference pipelines; hands-on project experience preferred;

  4. Interest in GPU/NPU, CUDA/Triton/C++, AI compilers, kernel optimization, distributed training/inference, model serving, performance analysis, or benchmarking;

  5. Strong learning ability and execution; able to carefully document experiment environments, configurations, logs, metrics, and reproduction steps;

  6. Able to commit to a stable internship — at least 3 days per week for 3+ months; long-term availability preferred.

Nice to have

  1. Experience with CUDA, Triton, C/C++, PyTorch custom operators, model inference serving, or training script development;

  2. Experience with LLMs/VLMs, multimodal models, distributed training, inference acceleration, quantization, KV cache, benchmarking, or profiling;

  3. Experience with Docker, Kubernetes, DeepSpeed, Megatron, vLLM, TensorRT, ONNX Runtime, TVM, MLIR, or LLVM;

  4. Open-source projects, research experience, competitions, papers, patents, or prior industry internships.

4. AI Heterogeneous Computing Intern | Internship | Shenzhen

Responsibilities

  1. AI model × domestic chip adaptation: Migrate, adapt, and optimize various AI models (LLMs, image models, multimodal models, AI4Science models) on domestic heterogeneous chips such as NPUs and GPGPUs;

  2. AI4Science deployment and algorithm development: Apply domain knowledge to deploy and tune AI4Science models on domestic chips, bringing AI capabilities to research and industrial scenarios such as biopharma, mineral exploration, and materials design;

  3. High-performance kernel development: Develop, debug, and optimize specific kernels based on project needs, directly producing deliverable engineering results;

  4. Experimental validation and technical exploration: Assist the R&D team with solution validation, benchmarking, and technical research to accelerate project progress.

Requirements

Track A: Model Adaptation and Compute Acceleration (engineering-oriented)

  1. Major in computer science, mathematics, electronic engineering, or a related field;

  2. Solid programming skills in C/C++ or Python; able to write reliable engineering code;

  3. A practiced vibe coder — daily user of AI coding tools like KernelCat, Claude Code, or Cursor, with your own methodology for AI-assisted development;

  4. Understand computer architecture fundamentals (chip architecture, memory hierarchy, parallel computing);

  5. Fast learner who can quickly ramp up on unfamiliar tech stacks.

Track B: AI4Science (domain-oriented)

  1. Major in physics, chemistry, biology, materials, earth sciences, or a related field; master's degree or above preferred;

  2. Research or project experience in AI4Science (molecular simulation, computational chemistry, protein structure prediction, geophysics, materials design, etc.);

  3. Systematic academic training with deep understanding of your field's problems and methods;

  4. Basic programming ability (Python is sufficient); engineering requirements can be relaxed;

  5. Able to translate domain knowledge into actionable technical solutions or algorithm designs.

General requirements

  1. No hard degree requirements — ability is what counts;

  2. Self-driven, resilient, curious — you dig in proactively rather than waiting to be assigned work;

  3. Fast learner who can build effective understanding of a new domain from scratch in a short time.

Nice to have

Track A:

  1. Kernel development experience (CUDA/Ascend C);

  2. Knowledge of microarchitecture;

  3. High-star GitHub projects or active open-source contributions.

Track B:

  1. Publications at top conferences or journals;

  2. Experience deploying models in real-world scenarios;

  3. Strong engineering skills on top of domain expertise.

5. LLM Inference Deployment Engineer | Full-time | Shenzhen

Responsibilities

  1. Private model deployment: Design and implement deployment solutions for open-source LLMs on heterogeneous hardware from multiple vendors (H200, Ascend, and other GPGPU/NPU platforms), including inference engine selection, secondary development (vLLM/SGLang/TensorRT-LLM, etc.), and service deployment tuning;

  2. Inference service performance and stability: Optimize KV cache management, PD disaggregation, dynamic batching, concurrent scheduling, and auto-scaling for real business workloads, ensuring throughput, latency, and stability under high concurrency;

  3. Joint debugging with Agent systems: Work closely with the Agent R&D team to iterate deployment solutions around real Agent call patterns (long context, tool calls, multi-turn interaction), surfacing and resolving end-to-end bottlenecks;

  4. Compute resource management and cluster optimization: Participate in resource scheduling and communication optimization for multi-node, multi-GPU scenarios, achieving sensible distribution across mixed-vendor compute.

Requirements

  1. Bachelor's degree or above in computer science, electronics, mathematics, or a related field; 3+ years of experience in LLM inference deployment or AI systems engineering;

  2. Proficient in at least one of C++/Python/Go; familiar with Linux and containerized deployment (Docker/Kubernetes);

  3. Familiar with at least one mainstream inference framework (vLLM, SGLang, TensorRT-LLM, etc.), with source-level secondary development or performance tuning experience;

  4. Understand the principles and applicable scenarios of inference optimization techniques such as KV cache, quantization, dynamic batching, PD disaggregation, and speculative decoding;

  5. Able to analyze performance bottlenecks end to end across business pipelines, with strong systems thinking — you can reason across the service, engine, and hardware layers;

  6. Strong communication skills; able to collaborate smoothly with the Agent team, chip vendors, and customer-side engineers.

Nice to have

  1. Hands-on deployment or tuning experience on domestic chips such as Ascend, Cambricon, or Hygon;

  2. Experience operating, scheduling, or optimizing communications on large-scale GPU clusters;

  3. Contributions to open-source inference frameworks such as vLLM or SGLang;

  4. A power user of AI Agent products with firsthand intuition for real Agent call patterns.

6. Kernel Automation Researcher | Full-time | Shenzhen

Responsibilities

  1. Research on automated kernel generation: Explore cutting-edge methods; design and validate automated kernel generation and cross-platform migration techniques for different hardware platforms (Ascend, GPGPU, etc.), producing verifiable solutions and demos;

  2. Toolchain iteration and deployment: Continuously iterate the kernel generation toolchain built on the company's in-house Agent system — identifying system deficiencies and improving completeness, reliability, and coverage — to drive large-scale, multi-category kernel generation into production;

  3. Cross-team collaboration: Work closely with the Agent R&D and chip hardware teams to continuously refine requirements, surface issues, and close the loop;

  4. Technical roadmap planning and frontier tracking: Follow the latest advances in AI compilers, kernel generation, and inference optimization; share within the team and incubate new directions.

Requirements

  1. Bachelor's degree or above in computer science, mathematics, electronics, physics, or a related field, with a solid background in high-performance computing, parallel computing, computer architecture, or AI compilers;

  2. Familiar with the Linux development environment and proficient in Python and C/C++, able to independently resolve environment setup, compilation, and debugging issues;

  3. Familiar with SIMD/SIMT/SPMD and other operator programming paradigms, with hands-on development and optimization experience in at least one of AscendC, Intel SSE, ARM NEON/SVE, SYCL, OpenMP/MPI, or various chip DSLs;

  4. Understand the basic structure of AI chip software stacks or HPC software stacks, and the principles behind memory access, parallelism, vectorization, and other performance optimization techniques;

  5. Clear logical thinking with strong verbal and written communication skills, able to quickly produce technical summaries and documentation;

  6. Capable of independently driving research on open-ended problems.

Preferred Qualifications

  1. Awards in supercomputing competitions such as ASC/SC/ISC, or participation in national-level HPC projects;

  2. Publications at top systems or HPC conferences such as OSDI/SOSP/MLSys/SC/PPoPP/ASPLOS;

  3. Knowledge of computer architecture, with the ability to analyze operator performance bottlenecks based on hardware characteristics;

  4. Strong interest and confidence in LLM technology, with deep experience using AI programming tools (such as coding agents);

  5. Contributions to open-source projects such as Triton/TVM/MLIR/vLLM/SGLang.

7. FAE Field Deployment Engineer (Operator Development)

Responsibilities

  1. Operator migration and development: Use the company's AI development tools to build operators on target platforms including NVIDIA, Ascend, Moore Threads, and Biren, based on project requirements;

  2. Model migration and performance tuning: For scenarios involving migration, adaptation, and performance optimization of deep learning models, use the company's AI development tools for operator-level optimization to improve inference speed and energy efficiency on target hardware;

  3. Technical communication and delivery: Serve as the technical point of contact, accurately understanding and translating customer business requirements into technical implementation plans;

  4. Support the business team with POC testing, and write clear delivery documentation and operating manuals;

  5. Test the KernelCAT tool in real projects, organize issues found and suggestions for improvement, and report them to the product and R&D teams to help continuously refine the AI Agent's capabilities, interaction experience, and performance.

Requirements

  1. Coding foundation: Proficient in Python, with basic C++ reading and modification ability;

  2. Deep understanding of the PyTorch/Transformers libraries, able to read model source code (Modeling.py) and understand computational graph structures;

  3. Proficient with AI tools: Comfortable and skilled with AI-assisted programming tools such as Cursor, Claude Code, and Codex;

  4. Able to use AI to quickly generate test scripts and conversion scripts, and to troubleshoot simple code bugs;

  5. Hands-on experience: Familiar with the low-level operator implementations and programming models of deep learning frameworks, with real operator development and optimization experience; familiar with at least one of CUDA, AscendC, MUSA-C, Triton, PyPTO, or similar operator development paradigms;

  6. Understand performance optimization techniques such as memory layout, parallel computing, and SIMD; have Python development skills and can write scripts for testing and automation workflows.

Preferred Qualifications

  1. Domestic compute experience: Familiar with domestic compute platforms such as Huawei Ascend, Moore Threads, and Cambricon; experience adapting models or debugging operators on domestic compute platforms is a strong plus;

  2. Experience using Kerminal or other AI operator generation tools;

  3. Contributions of operators or optimization code to open-source communities such as CUDA or CANN.

8. Key Account Sales Manager | Full-time (Experienced Hire) | Shenzhen

Responsibilities

  1. Develop and maintain the company's key accounts, targeting customer groups such as AI chip makers, intelligent computing centers, cloud service providers, and model service providers, and drive commercial partnerships to completion;

  2. Deeply understand customer needs in operator adaptation, model migration, and compute acceleration, and work with the technical team to deliver targeted product solutions and service support;

  3. Coordinate internal R&D, product, and delivery resources, organize cross-functional collaboration, and provide customers with high-quality solutions and delivery experiences;

  4. Track industry trends and competitive intelligence in domestic AI compute chips and the intelligent computing ecosystem, providing a basis for the company's market strategy;

  5. Build and maintain a customer information management system, promptly recording customer needs, project progress, and communication history to support company operations with data;

  6. Meet customer acquisition and sales performance targets in line with company business goals.

Requirements

  1. Bachelor's degree or above; computer science, electronic engineering, mechanics, or related STEM majors preferred;

  2. 1–2 years of sales experience; experience selling AI compute products, domestic chip ecosystem products, or Huawei ecosystem products preferred;

  3. Strong customer relationship management and business communication skills, results-driven;

  4. Some understanding of — or willingness to learn about — AI chips, operator optimization, high-performance computing, and related fields;

  5. Experience selling through Huawei channels or within the Ascend ecosystem preferred.

Preferred Qualifications

  1. Customer resources among AI chip makers (such as Hygon, MetaX), intelligent computing centers, or cloud service providers;

  2. Familiarity with Huawei's Ascend, CANN, and Kunpeng product lines and channel systems;

  3. Experience in project-based or solution-based sales, able to independently manage the full process from opportunity discovery to contract signing;

  4. A degree of technical understanding, able to collaborate efficiently with R&D teams.

9. All-in-One Appliance Sales Manager | Full-time (Experienced Hire) | Shenzhen

Responsibilities

  1. Drive market development and customer maintenance for the company's programming all-in-one machines, large model all-in-one machines, and AI compute server products;

  2. Target customers including universities, research institutes, government and enterprise clients, model service providers, and channel partners, driving product sales and commercial partnerships;

  3. Deeply understand customer needs for all-in-one machines, and work with the technical team to provide targeted product configuration plans and application support;

  4. Develop and maintain channel partner relationships for all-in-one machines, building a channel distribution system;

  5. Regularly provide enablement training for channel partners, driving them to complete product promotion and sales;

  6. Coordinate internal R&D, product, and delivery resources to drive cross-functional collaboration and ensure the quality of solution design, installation, deployment, and after-sales delivery;

  7. Track industry trends and competitive intelligence in large model all-in-one machines and AI compute hardware, providing a basis for product positioning and market planning;

  8. Build and maintain customer and channel partner information management systems, promptly recording and following up on project needs, progress, and communications;

  9. Develop sales plans in line with company business goals, and meet customer acquisition and sales performance targets.

Requirements

  1. Bachelor's degree or above;

  2. Strong customer relationship management and business communication skills;

  3. Results-driven, able to independently manage the full sales process from lead generation to contract signing;

  4. Some understanding of — and willingness to learn about — large model applications and the AI compute hardware ecosystem;

  5. Understanding of current market conditions, with capabilities in market planning, market analysis, and channel resource integration.

Preferred Qualifications

  1. Background in computer science, electronic engineering, or related STEM fields;

  2. Sales experience with traditional servers, commercial PCs, AI compute hardware, or large model server all-in-one machines;

  3. Existing server channel partner resources;

  4. Experience in channel development, distribution system building, or channel operations.

10. Senior Visual Designer | Full-time (Experienced Hire) | Shenzhen

Responsibilities

  1. Own visual creative direction, visual optimization, and design work across the company's business lines;

  2. Use AI tools to deliver creative needs across business lines, and ensure design quality through professional expertise;

  3. With a keen aesthetic sensibility, continuously explore visual styles that fit business and brand needs;

  4. Follow new technologies in design and AI, and drive their application in real work.

Requirements

  1. Bachelor's degree or above, with 6+ years of visual design experience;

  2. Excellent multi-style visual control and design execution ability;

  3. Proficient with AI creation tools such as GPT, Gemini, Midjourney, and Lovart;

  4. Strong cross-functional communication skills, sense of responsibility, and self-motivation;

  5. A personal portfolio must be attached when submitting your resume;

  6. Salary: 25–45K per month, 16 months per year.

Preferred Qualifications

  1. Experience at a major internet company with successful project cases;

  2. Experience building AI design workflows;

  3. Capabilities in brand identity design, motion design, or UI design;

  4. Experience in the AI or internet industry.

11. AI Product Content Operations | Full-time (Experienced Hire) | Shenzhen

Responsibilities

  1. Plan and operate product content across Xiaohongshu, WeChat official accounts, communities, and other platforms and channels;

  2. Deeply experience and understand the product, identify user scenarios and content opportunities, and turn product capabilities into content that users can understand, find interesting, and want to save and share;

  3. Run day-to-day operations of user communities, continuously collecting user questions, usage feedback, and real needs; distill high-value insights and convert them into content topics, user cases, and product improvement suggestions;

  4. Keep track of trends in AI products, agents, and productivity tools, and monitor and analyze the content strategies and operations of comparable products;

  5. Track core metrics such as readership, engagement rate, saves, follower growth, user conversion, and community activity; conduct regular reviews and optimizations to continuously improve content reach and operational results.

Requirements

  1. Bachelor's degree or above; experience with AI products, new media, or content operations preferred;

  2. Strong writing skills and content judgment; familiar with content platforms like Xiaohongshu and WeChat official accounts, and understand the user characteristics, content formats, and distribution mechanics of different platforms;

  3. Familiar with AI products, agents, and productivity tools, and willing to proactively try and study new products; able to evaluate, edit, and rewrite AI-generated content;

  4. Strong user awareness and communication skills, able to identify real needs, typical problems, and content opportunities from user conversations and feedback;

  5. Good internet sensibility and topic-planning ability, able to proactively propose topics and drive them to execution;

  6. Basic data analysis awareness;

  7. Strong initiative and execution ability, able to independently drive a content or operations project from idea to launch.

Preferred Qualifications

  1. Operations experience in tech products or innovative technology fields, such as AI products, consumer electronics (3C), robotics, semiconductors, SaaS, or office software; experience with AI products, agents, or productivity tools is an even bigger plus;

  2. Participation in content planning, account operations, user communities, or growth projects for tech/AI products, with relevant work samples or case studies;

  3. Proficient use of AI tools such as ChatGPT, Claude, Doubao, and Qwen to support topic research and content production;

  4. Basic skills in image creation, graphic-text layout, short-video scripting, or video production.

Related reading: KernelCAT's Lin Zhihang: Building Intelligence That Truly Controls Your Computer

LinkZill

LinkZill's founding team has deep roots in TFT semiconductors. CEO Dr. Linrun Feng previously served as Vice President of NeuDrive in the UK; CTO Dr. Zhe Liu came from CSOT (China Star Optoelectronics Technology); and Chief Scientist Professor Xiaojun Guo brings nearly 20 years of R&D experience in novel semiconductors.

The team is driving the commercialization of TFT semiconductors in life sciences, next-generation sensing, and display applications. It has developed a TFT-based DNA synthesizer and provides chip, system, and process services. To date, the company has served more than 400 clients across over 20 countries and regions.

Open Positions (click the text to view the JD):

1. Business Development Manager (Optoelectronics) | Campus Recruiting/Internship | Hong Kong

[Responsibilities]

  1. Business development and lead management: Take full ownership of business development, product development, and customer delivery for the TFT next-generation optoelectronics product line in Hong Kong and Asian markets (excluding mainland China); build a local customer network in Hong Kong (with a focus on target segments such as universities, research institutes, and next-generation display R&D organizations), follow up on potential customer leads, organize technical exchanges, product demos, and solution evaluations, and drive the full process from lead identification to commercial contract signing;

  2. Full product lifecycle management: Coordinate with the headquarters optoelectronics team and supply chain resources to manage the delivery of TFT chips and supporting systems to customers — from customer needs research, technical solution confirmation, and customized development coordination through final delivery and acceptance — ensuring delivery timeliness and quality meet customer expectations, and driving repeat purchases and long-term partnerships;

  3. Technical coordination and product iteration: Work with the product and R&D teams at Hangzhou headquarters to stay aligned on updates to the ZhiHe ("Sincere Box") product series and TFT customization services, ensuring efficient two-way technical information flow between the two locations;

  4. Requirements feedback and localization optimization: Collect customization requirements from customers in Hong Kong and overseas, produce product optimization recommendations, and support adjustments to localized product planning;

  5. Industry research and decision support: Track frontier trends at the intersection of TFT with life sciences, sensing, and display, providing input for business and technology planning;

  6. Government and enterprise engagement: Interface with official innovation platforms such as the Hong Kong Science and Technology Parks Corporation and InvestHK, promoting the company's integration into the local semiconductor and life-and-health industry ecosystems.

[Requirements]

  1. PhD (graduates of Hong Kong institutions or QS Top 100 universities preferred) in electronic engineering, microelectronics, optoelectronic engineering, or related STEM fields; fresh PhD graduates are welcome;

  2. Candidates with business or research experience in optoelectronics or semiconductors, combining technical depth with commercial acumen, are preferred;

  3. Interest in interdisciplinary fields, strong learning ability, and a goal-driven mindset are a plus;

  4. Understanding of optoelectronic devices, next-generation displays, and related technologies and application scenarios; capable of independently developing customers, conducting business negotiations, and managing channels, with the ability to drive the full commercial process;

  5. Fluent in both Chinese and English, with English usable as a working language (for technical and business communication); proficiency in Cantonese is a plus.

2. Business Development Manager (Biology) | Campus Recruiting/Internship | Hong Kong

[Responsibilities]

  1. Conduct market research and customer needs discovery for the company's biological products (synthesis instruments, synthesized products, supporting lab equipment, etc.) in the Hong Kong market; build customer profiles and define market expansion directions;

  2. Build and maintain sales channels for the biotech sector in Hong Kong; screen distributors, conduct partnership negotiations, complete regional market layout, and rapidly expand the sales network;

  3. Engage target customers such as university life science labs, biotech companies, and in-vitro diagnostics firms; deeply understand customers' experimental pain points and procurement needs, and drive precise matching of products and services;

  4. Promote the "bio-instruments + technical services" business model; organize technical exchanges and product demos, advance commercial partnerships, and ensure sales targets are met;

  5. Follow up on customer project delivery and after-sales feedback, maintain customer relationships, drive repeat purchases, and build a local customer service system for the biotech sector in Hong Kong.

[Requirements]

  1. PhD, preferably in biology, medicine, bioengineering, biomedical engineering, biochemistry, or a related field;

  2. Fresh PhD graduates are welcome; candidates with business development experience in life sciences, scientific instrument sales, or research project experience are preferred;

  3. Capable of independently developing customers, conducting business negotiations, and managing channels, with the ability to drive the full commercial partnership process;

  4. Understanding of life science experimental paradigms; familiarity with sales scenarios for bio-instruments such as high-throughput sequencers, digital PCR, and microfluidic devices is a plus;

  5. Fluent Chinese-English bilingual communication skills, able to handle business communication and technical exchanges in English; Cantonese is a plus; clear logical thinking and a strong customer service mindset.

3. Chip Synthesis R&D Engineer | Campus Recruiting/Internship | Hangzhou

[Responsibilities]

  1. Design and optimize DNA synthesis chip structures, surface chemistry, process systems, and biological characterization;

  2. Work with the team on the development, optimization, and standardization of chip-based DNA synthesis instruments;

  3. Deliver the development goals and deliverables for the company's biochip-related products;

  4. Analyze scientific literature and conduct patent searches related to chip synthesis, and file for technical patent protection for the company based on the findings.

[Requirements]

  1. Bachelor's degree or above in synthetic biology, biochemistry, biomedicine, biomaterials, organic/polymer chemistry, or a related field;

  2. Experience in projects involving synthetic biology, nucleic acid chemistry, gene sequencing, or molecular diagnostics; familiarity with the design principles and underlying logic of biological lab instruments;

  3. One year or more of multidisciplinary work experience spanning biology, chemistry, materials, electronics, or mechanics — or an outstanding fresh graduate;

  4. Strong learning ability and sense of professional responsibility, with excellent teamwork skills and cross-disciplinary innovation capability.

4. DNA Synthesis Engineer | Campus Recruiting | Hangzhou

[Responsibilities]

  1. Participate as a team member in the optimization and standardization of chip-based DNA synthesis processes;

  2. Under guidance, execute the production, quality inspection, and delivery of internal and external DNA synthesis orders according to SOPs.

[Requirements]

  1. Bachelor's degree or above in molecular biomedicine, synthetic biology, biochemistry, chemistry, or a related field;

  2. Experience in projects involving chemical DNA synthesis, synthetic biology, nucleic acid chemistry, or gene sequencing; familiarity with common biology lab instruments such as gel electrophoresis systems and fluorescence scanners;

  3. One year or more of research experience in molecular biology, biochemistry, synthetic biology, or chemistry — or an outstanding fresh graduate;

  4. Strong learning ability and sense of responsibility, integrity and reliability, and a collaborative and innovative spirit.

5. Technical Product Manager | Experienced Hire | Hangzhou

[Responsibilities]

  1. TFT chip development: Based on customer requirements, formulate TFT chip design plans and organize teams to complete the outsourcing of chip layout drawings. After tape-out at the panel fab, test the chips, assist customers with chip verification, and complete TFT chip delivery;

  2. Electronic system development: Based on customer requirements, formulate electronic system design plans and organize teams to complete development and acceptance. Maintain regular communication with customers and complete electronic system delivery;

  3. New technology development: Based on market/customer research, formulate development plans for new technologies and organize teams to complete TFT chip layout outsourcing and the development of supporting electronic systems;

  4. Customer development: Through literature review, company research, and customer visits, establish business contacts with potential customers, provide feasible TFT technical solutions, and drive their implementation.

[Requirements]

  1. Two years or more of work experience in panel layout design;

  2. Proficiency in one of Empyrean (Huada Jiutian), KLayout, or Laker, or other EDA design software with equivalent functionality;

  3. Full-time master's degree or above;

  4. English CET-4 or above, able to read English-language literature and read/write English emails;

  5. Strong project management and communication/coordination skills;

  6. Strong innovation and development capabilities.